Package CPU.instructions


package CPU.instructions
Some emulated 68000 instructions. Note : There are other replacement instructions in individual packages.
  • Classes
    Class
    Description
    The ABCD instruction in all of its variants.
    The ADDI instruction in all of its variants.
    The ADDX instruction (mem to mem) in all of its variants.
    The ADDX instruction (register to register) in all of its variants.
    The ANDI instruction in all of its variants.
    The ANDI_TO_CCR instruction in all of its variants.
    The ANDI_TO_SR instruction in all of its variants.
    The AND instruction where the destination is a mem location, in all of its variants.
    The AND instruction where the destination is a register, in all of its variants.
    The Bcc instructions, excluding BRA, BSR.
    The BCHG instruction where the bit number is contained in a word following the instruction, in all of its variants.
    The BCHG instruction where the bit number is contained in a register, in all of its variants.
    The BCLR instruction where the bit number is contained in a word following the instruction, in all of its variants.
    The BCLR instruction where the bit number is contained in a register, in all of its variants.
    The BRA instruction in all of its variants.
    The BSET instruction where the bit number is contained in a word following the instruction, in all of its variants.
    The BSET instruction where the bit number is contained in a register, in all of its variants.
    The emulated BSR instruction in all of its variants.
    The CHK instruction in all of its variants.
    A replacement DBcc instruction in all of its variants This is based on Tony Headford's work.
    The emulated DIVS (word sized) instruction in all of its variants.
    The emulated DIVU (word sized) instruction in all of its variants.
    The EOR instruction where the destination is a mem location, in all of its variants.
    The EORI instruction in all of its variants.
    The EORI_TO_CCR instruction in all of its variants.
    The EORI_TO_SR instruction in all of its variants.
    The EXG instruction in all of its variants.
    The EXT instruction in all of its variants.
    The ILLEGAL instruction in all of its variants.
    Illegal instruction used by Qmon (4afb) - set the correct pc address.
    The LINK instruction in all of its variants.
    The MOVE_FROM_SR instruction in all of its variants.
    The MOVE_FROM_SR instruction in all of its variants.
    The MOVE_TO_CCR instruction in all of its variants.
    The MOVE_TO_SR instruction in all of its variants.
    A redefinition of the MOVE TO/FROM USP instructions.
    The MOVEPr2m instruction where move is made from mem to reg.
    The MOVEPr2m instruction where move is made from reg to mem.
    A replacement MOVEQ instruction in all of its variants This is based on Tony Headford's work.
    The emulated MULS (word sized) instruction in all of its variants.
    The emulated MULU (word sized) instruction in all of its variants.
    The NBCD instruction in all of its variants.
    The NEG instruction in all of its variants.
    The NEGX instruction in all of its variants.
    The NOP instruction.
    The NOT instruction in all of its variants.
    This is a "null" instruction - actually means that an illegal opcode will be "executed".
    The ORI instruction in all of its variants.
    The ORI_TO_CCR instruction in all of its variants.
    The ORI_TO_SR instruction in all of its variants.
    The OR instruction where the destination is a mem location, in all of its variants.
    The OR instruction where the destination is a register, in all of its variants.
    The PEA instruction in all of its variants.
    The RESET instructions.
    A redefinition of the RTE instruction.
    A redefinition of the RTR instruction.
    A definition of the RTS instruction.
    The ABCD instruction in all of its variants.
    The SCC instruction in all of its variants.
    The STOP instructions.
    The SUBI instruction in all of its variants.
    The SUBX instruction (mem to mem) in all of its variants.
    The SUBX instruction (mem to mem) in all of its variants.
    The SWAP instruction in all of its variants.
    The TAS instruction in all of its variants.
    Illegal instruction used by Qmon (4afb) - set the correct pc address.
    The TRAP instruction in all of its variants.
    The TRAPV instruction in all of its variants.
    The UNLK instruction in all of its variants.