Uses of Interface
CPU.InstructionSet

Packages that use InstructionSet
Package
Description
 
Some emulated 68000 instructions.
ADD and ADDA instructions where the destination is a register.
ADD instructions where the destination is an EA operand.
The ADDQ instruction in all of its variants.
The ASL istructions.
The ASR istructions.
Emulation of the BTST instruction in all of its variants.
Emulations of the CLR instructions.
These are what I hope to be slightly faster emulations of the CMP and CMPA instructions.
Emulations of the CMPI instruction variants.
Emulation of the JMP instruction(s).
The JSR instruction in all its variants.
These are what I hope to be slightly faster emulations of the LEA instruction variants.
The emulated LSL instructions.
The emulated LSR instructions.
These are replacement MOVE instructions for SMSQmulator.
These are replacement MOVEA instructions for SMSQmulator.
These are replacement MOVEM instructions for SMSQmulator.
All of the emulated ROL instructions.
All of the emulated ROR instructions.
All of the emulated ROXL and ROXR instructions.
SUB and SUBA instructions where the destination is a register.
SUB instructions where the destination is an EA operand.
Emulation of the SUBQ instruction in all of its variants.
These are replacement TST instructions for SMSQmulator.
  • Uses of InstructionSet in CPU

    Classes in CPU that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    This is used to communicate with the Java monitor for TRAP calls.
  • Uses of InstructionSet in CPU.instructions

    Classes in CPU.instructions that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ABCD instruction in all of its variants.
    class 
    The ADDI instruction in all of its variants.
    class 
    The ADDX instruction (mem to mem) in all of its variants.
    class 
    The ADDX instruction (register to register) in all of its variants.
    class 
    The ANDI instruction in all of its variants.
    class 
    The ANDI_TO_CCR instruction in all of its variants.
    class 
    The ANDI_TO_SR instruction in all of its variants.
    class 
    The AND instruction where the destination is a mem location, in all of its variants.
    class 
    The AND instruction where the destination is a register, in all of its variants.
    class 
    The Bcc instructions, excluding BRA, BSR.
    class 
    The BCHG instruction where the bit number is contained in a word following the instruction, in all of its variants.
    class 
    The BCHG instruction where the bit number is contained in a register, in all of its variants.
    class 
    The BCLR instruction where the bit number is contained in a word following the instruction, in all of its variants.
    class 
    The BCLR instruction where the bit number is contained in a register, in all of its variants.
    class 
    The BRA instruction in all of its variants.
    class 
    The BSET instruction where the bit number is contained in a word following the instruction, in all of its variants.
    class 
    The BSET instruction where the bit number is contained in a register, in all of its variants.
    class 
    The emulated BSR instruction in all of its variants.
    class 
    The CHK instruction in all of its variants.
    class 
    A replacement DBcc instruction in all of its variants This is based on Tony Headford's work.
    class 
    The emulated DIVS (word sized) instruction in all of its variants.
    class 
    The emulated DIVU (word sized) instruction in all of its variants.
    class 
    The EOR instruction where the destination is a mem location, in all of its variants.
    class 
    The EORI instruction in all of its variants.
    class 
    The EORI_TO_CCR instruction in all of its variants.
    class 
    The EORI_TO_SR instruction in all of its variants.
    class 
    The EXG instruction in all of its variants.
    class 
    The EXT instruction in all of its variants.
    class 
    The ILLEGAL instruction in all of its variants.
    class 
    Illegal instruction used by Qmon (4afb) - set the correct pc address.
    class 
    The LINK instruction in all of its variants.
    class 
    The MOVE_FROM_SR instruction in all of its variants.
    class 
    The MOVE_FROM_SR instruction in all of its variants.
    class 
    The MOVE_TO_CCR instruction in all of its variants.
    class 
    The MOVE_TO_SR instruction in all of its variants.
    class 
    A redefinition of the MOVE TO/FROM USP instructions.
    class 
    The MOVEPr2m instruction where move is made from mem to reg.
    class 
    The MOVEPr2m instruction where move is made from reg to mem.
    class 
    A replacement MOVEQ instruction in all of its variants This is based on Tony Headford's work.
    class 
    The emulated MULS (word sized) instruction in all of its variants.
    class 
    The emulated MULU (word sized) instruction in all of its variants.
    class 
    The NBCD instruction in all of its variants.
    class 
    The NEG instruction in all of its variants.
    class 
    The NEGX instruction in all of its variants.
    class 
    The NOP instruction.
    class 
    The NOT instruction in all of its variants.
    class 
    The ORI instruction in all of its variants.
    class 
    The ORI_TO_CCR instruction in all of its variants.
    class 
    The ORI_TO_SR instruction in all of its variants.
    class 
    The OR instruction where the destination is a mem location, in all of its variants.
    class 
    The OR instruction where the destination is a register, in all of its variants.
    class 
    The PEA instruction in all of its variants.
    class 
    The RESET instructions.
    class 
    A redefinition of the RTE instruction.
    class 
    A redefinition of the RTR instruction.
    class 
    A definition of the RTS instruction.
    class 
    The ABCD instruction in all of its variants.
    class 
    The SCC instruction in all of its variants.
    class 
    The STOP instructions.
    class 
    The SUBI instruction in all of its variants.
    class 
    The SUBX instruction (mem to mem) in all of its variants.
    class 
    The SUBX instruction (mem to mem) in all of its variants.
    class 
    The SWAP instruction in all of its variants.
    class 
    The TAS instruction in all of its variants.
    class 
    Illegal instruction used by Qmon (4afb) - set the correct pc address.
    class 
    The TRAP instruction in all of its variants.
    class 
    The TRAPV instruction in all of its variants.
    class 
    The UNLK instruction in all of its variants.
  • Uses of InstructionSet in CPU.instructions.ADD2Dn

    Classes in CPU.instructions.ADD2Dn that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ADD and ADDA instruction where the destination is a data/addr register and the source is An.
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is (An).
    class 
    The ADD/ADDAinstruction where the destination is a data/addr register and the source is (An)+.
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is d16(An).
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is d16(Pc).
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is d8(An,Xn).
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is d8(PC,Xn).
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is Dn.
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is Immediate data.
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is L absolute.
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is -(An).
    class 
    The ADD/ADDA instruction where the destination is a data/addr register and the source is W absolute.
  • Uses of InstructionSet in CPU.instructions.ADD2EA

    Classes in CPU.instructions.ADD2EA that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ADD instruction where the source is Dn and the destination is (An).
    class 
    The ADD instruction where the source is Dn and the destination is (An)+.
    class 
    The ADD instruction where the source is Dn and the destination is d16(An).
    class 
    The ADD instruction where the source is Dn and the destination is d8(An,Xn).
    class 
    The ADD instruction where the source is Dn and the destination is L.
    class 
    The ADD instruction where the source is Dn and the destination is -(An).
    class 
    The ADD instruction where the source is Dn and the destination is W.
  • Uses of InstructionSet in CPU.instructions.ADDQ

    Classes in CPU.instructions.ADDQ that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ADDQ instruction where destination is An.
    class 
    The ADDQ instruction where destination is (An)+.
    class 
    The ADDQ instruction where destination is (An).
    class 
    The ADDQ instruction where destination is d16(An).
    class 
    A definition of the ADDQ instruction where destination is d16(An).
    class 
    The ADDQ instruction where destination is Dn.
    class 
    The ADDQ instruction where destination is .L absolute.
    class 
    TheADDQ instruction where destination is -(An).
    class 
    The ADDQ instruction where destination is L absolute).
  • Uses of InstructionSet in CPU.instructions.ASL

    Classes in CPU.instructions.ASL that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ASL instruction where data to be shifted is in a data reg and the shift count is immediate.
    class 
    The ASL instruction where data to be shifted is in memory.
    class 
    The ASL instruction where data to be shifted is in a data reg and the shift count is in another data reg.
  • Uses of InstructionSet in CPU.instructions.ASR

    Classes in CPU.instructions.ASR that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The ASR instruction where data to be shifted is in a data reg and the shift count is immediate.
    class 
    The ASR instruction where data to be shifted is in memory.
    class 
    The ASR instruction where data to be shifted is in a data reg and the shift count is in another data reg.
  • Uses of InstructionSet in CPU.instructions.BTST

    Classes in CPU.instructions.BTST that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The BTST instruction where data to be tested is in (An) .
    class 
    The BTST instruction where data to be tested is in (An)+ .
    class 
    The BTST instruction where data to be tested is in d16(An) .
    class 
    The BTST instruction where data to be tested is in d16(An) .
    class 
    The BTST instruction where data to be tested is in d8(An,Xn) .
    class 
    The BTST instruction where data to be tested is in d8(PC,Xn) .
    class 
    The BTST instruction where data to be tested is in Dn (dynamic and static).
    class 
    The BTST instruction where data to be tested is in .L .
    class 
    The BTST instruction where data to be tested is in -(An) .
    class 
    The BTST instruction where data to be tested is in .W .
  • Uses of InstructionSet in CPU.instructions.CLR

    Classes in CPU.instructions.CLR that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The CLR instruction where the destination is (An).
    class 
    The CLR instruction where hte destination is (An)+.
    class 
    The CLR instruction where the destination is d16(An).
    class 
    The CLR instruction where the destination is d8(An,Xn).
    class 
    The CLR instruction where the destination is Dn.
    class 
    The CLR instruction where the destination is L absolute).
    class 
    The CLR instruction where the destination is -(An).
    class 
    The CLR instruction where the destination is W absolute).
  • Uses of InstructionSet in CPU.instructions.CMP

    Classes in CPU.instructions.CMP that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    A redefinition of the CMP and CMPA instruction where source is An.
    class 
    A redefinition of the CMP and CMPA instruction where source is (An).
    class 
    A redefinition of the CMP and CMPA instruction where source is (An)+.
    class 
    A redefinition of the CMP and CMPA instruction where source is d16(An).
    class 
    The CMP and CMPA instructions where source is d16(Pc).
    class 
    The CMP and CMPA instruction where source is d8(An,Xn).
    class 
    The CMP and CMPA instruction where source is d(Pc,Xn).
    class 
    The CMP and CMPA instruction where source is Dn.
    class 
    The CMP instruction where source is immediate data.
    class 
    The CMP and CMPA instructions where source is .L absolute.
    class 
    The CMP and CMPA instructions where source is -(An).
    class 
    The CMP and CMPA instructions where source is .W absolute.
    class 
    The CMPM instructions
  • Uses of InstructionSet in CPU.instructions.CMPI

    Classes in CPU.instructions.CMPI that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The CMPI instruction where destination is (An).
    class 
    The CMPI instruction where destination is (An)+.
    class 
    The CMPI instruction where destination is d16(An).
    class 
    The CMPI instruction where destination is d8(An,Xn).
    class 
    The CMPI instruction where destination is Dn.
    class 
    The CMPI instruction where destination is .L absolute.
    class 
    The CMPI instruction where destination is -(An).
    class 
    The CMPI instruction where destination is .W absolute.
  • Uses of InstructionSet in CPU.instructions.JMP

    Classes in CPU.instructions.JMP that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The JMP instruction where source is (An).
    class 
    The JMP instruction where source is d16(An).
    class 
    The JMP instruction where source is d8(An,Xn) Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JMP instruction where source is .W absolute Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JMP instruction where source is .L absolute Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JMP instruction where source is d16(PC) absolute.
    class 
    The JMP instruction where source is d8(PC,Xn).
  • Uses of InstructionSet in CPU.instructions.JSR

    Classes in CPU.instructions.JSR that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The JSR instruction where source is (An).
    class 
    The JSR instruction where source is d16(An).
    class 
    The JSR instruction where source is d8(An,Xn) Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JSR instruction where source is .W absolute.
    class 
    The JSR instruction where source is .L absolute Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JSR instruction where source is d16(PC) absolute Based on code by Tony Headford, see his licence in accompanying file.
    class 
    The JSR instruction where source is d8(PC,Xn).
  • Uses of InstructionSet in CPU.instructions.LEA

    Classes in CPU.instructions.LEA that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The LEA instructions where source is (An).
    class 
    The LEA instructions where source is d16(An).
    class 
    The LEA instructions where source is d16(PC) 0100dddd111mmmrrr where dd = destination reg mmm = source mode = 111 rrr = source reg =010
    class 
    The LEA instruction where source is d8(An,Xn).
    class 
    The LEA instructions where source is d16(PC) 0100dddd111mmmrrr where dd = destination reg mmm = source mode = 111 rrr = source reg =011
    class 
    The LEA instructions where source is .L absolute.
    class 
    The LEA instructions where source is .W absolute.
  • Uses of InstructionSet in CPU.instructions.LSL

    Classes in CPU.instructions.LSL that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.LSR

    Classes in CPU.instructions.LSR that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.MOVE

    Classes in CPU.instructions.MOVE that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.MOVEA

    Classes in CPU.instructions.MOVEA that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.MOVEM

    Classes in CPU.instructions.MOVEM that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.ROL

    Classes in CPU.instructions.ROL that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
     
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  • Uses of InstructionSet in CPU.instructions.ROR

    Classes in CPU.instructions.ROR that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.ROX

    Classes in CPU.instructions.ROX that implement InstructionSet
    Modifier and Type
    Class
    Description
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  • Uses of InstructionSet in CPU.instructions.SUB2Dn

    Classes in CPU.instructions.SUB2Dn that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The SUB and SUBA instruction where the destination is a data/address register and the source is An.
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is (An).
    class 
    The SUB/SUBAinstruction where the destination is a data/address register and the source is (An)+.
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is d16(An).
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is d16(Pc).
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is d8(An,Xn).
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is d8(PC,Xn).
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is Dn.
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is Immediate data.
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is L absolute.
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is -(An).
    class 
    The SUB/SUBA instruction where the destination is a data/address register and the source is W absolute.
  • Uses of InstructionSet in CPU.instructions.SUB2EA

    Classes in CPU.instructions.SUB2EA that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The SUB instruction where the source is Dn and the destination is (An).
    class 
    The SUB instruction where the source is Dn and the destination is (An)+.
    class 
    The SUB instruction where the source is Dn and the destination is d16(An).
    class 
    The SUB instruction where the source is Dn and the destination is d8(An,Xn).
    class 
    The SUB instruction where the source is Dn and the destination is L.
    class 
    The SUB instruction where the source is Dn and the destination is -(An).
    class 
    The SUB instruction where the source is Dn and the destination is W.
  • Uses of InstructionSet in CPU.instructions.SUBQ

    Classes in CPU.instructions.SUBQ that implement InstructionSet
    Modifier and Type
    Class
    Description
    class 
    The SUB instruction where destination is An.
    class 
    The SUBQ instruction where destination is (An)+.
    class 
    The SUBQ instruction where destination is (An).
    class 
    The SUBQ instruction where destination is d16(An).
    class 
    The SUBQ instruction where destination is d16(An).
    class 
    The SUBQ instruction where destination is Dn.
    class 
    The SUBQ instruction where destination is .W absolute.
    class 
    The SUBQ instruction where destination is -(An).
    class 
    The SUBQ instruction where destination is L absolute).
  • Uses of InstructionSet in CPU.instructions.TST

    Classes in CPU.instructions.TST that implement InstructionSet
    Modifier and Type
    Class
    Description
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